Biography: Huu-Thuan Huynh  received a Bachelor of Science (B.Sc.), Master of Science (M.S.), and Doctor of Philosophy (Ph.D.) degree in 1997, 2001, and 2009, respectively. 

Research Interests: Digital Signal Processing (DSP) in audio and image processing, Hardware Architecture, Embedded Systems (FPGA-based), and IC design. 

Teaching: 

• C Programming

• System-on-Programmable-Chip (SoPC) Design

• Computer Architecture

• Embedded Systems

Projects:

1.   Object Detection and Tracking System (Principal Investigator, 2009)

2.   SoPC Design for Real-time Data Processing Applications (Principal Investigator, 2011)

3.   Development of an Electronics Laboratory Using Computer Networks (Member, 2003)

4.   Design of a 16-bit DSP Architecture and Implementation on FPGA, DSP Development Board Programming (Member, 2006)

5.   Simulation of Surface Defect Detection and Development of an Automated Defect Detection System (Member, 2009)

6.   Design and Implementation of Specialized IP Cores for Public-key and Stream Ciphers on FPGA (Member, 2014)

7.   Embedded System Design on FPGA and Synthesizer IC for Vietnamese TTS (Principal Investigator, 2015)

8.   Research and Implementation of Specialized IP Cores for Encryption/Decryption on FPGA (Member, 2015)

9.   Development of Cryptographic Algorithms (RSA and ZUC) for Secure Video Transmission and Hardware Implementation for Information Security Applications (Principal Investigator, 2015)

10.   SoC FPGA-based IC Design for Secure IoT Applications (Principal Investigator, 2021)

Publication: 

1.   Tan-Phat Dang; Tuan-Kiet Tran; Nhu-Hoang Nguyen; Huu-Thuan Huynh; Cong-Kha Pham, "A Resource-Efficient VVC IME Architecture Using Buffered Aggregation and Bubble-Aware Comparison", IEEE Embedded Systems Letters, 2026

2.   Tuan-Kiet Tran; Tan-Phat Dang; Nhu-Hoang Nguyen; Huu-Thuan Huynh; Cong-Kha Pham, "Model-to-Hardware Co-Design of a Resource-Efficient RISC-V Edge AI SoC for 1D CNN ECG Classification", IEEE Embedded Systems Letters, 2026

3.   Minh-Hieu Vo; Thien-Van Nguyen; Trong-Nhan Huynh; Tan-Phat Dang; Huu-Thuan Huynh, “Hardware Implementation of an Autoencoder on a Field Programmable Gate Array”, Journal: Eng. Proc., 2026, Volume: 141

4.   Tan-Phat Dang; Nhu-Hoang Nguyen; Tuan-Kiet Tran; Anh-Tuan Hoang; Huu-Thuan Huynh*; Cong-Kha Pham.  “Early Termination for Integer Motion Estimation via Multi-level Successive Elimination in Versatile Video Coding,”  IEEE Access, (Early Access), 2025

5.   Huynh, H.-T.; Tran, T.-K.; Dang, T.-P, "Implementing a Very High-Speed SHA-3 Accelerator for PCIe Compatible with High-Performance Modern Applications" International Journal of Reconfigurable and Embedded Systems (IJRES), Vol. 14, No. 1, March 2025, pp. 1∼11

6.   Minh-Tuyen Huynh, Tuan-Kiet Tran, Thanh-Dat Bui, Cong-Kha Pham, Huu-Thuan Huynh, “An Efficient Algorithm Compatible with Low-performance Hardware for AI Edge Devices in Arrhythmia Prediction,”  International Conference on Intelligent Systems & Networks (ICISN 2025)”, 2025. Springer.

7.   Tuan-Kiet Tran, Minh-Tuyen Huynh, Quoc-Minh Dang Do, Cong-Kha Pham, Huu-Thuan Huynh,” A Hardware-Friendly Approach for ECG Classification based on Deep Learning Algorithm,” International Conference On Computational Intelligence In Engineering Science (ICCIES 2025), 2025. Springer.

8.   Huy-Duc Pham, Thi-Minh-Tuyen Huynh, Tuan-Kiet Tran, Thanh-Dat Bui, Cong-Kha Pham, Huu-Thuan Huynh , “Efficient AI Model and Hardware Architecture Based on CNN for Arrhythmia Prediction,” 2025 10th IEEE International Conference on Integrated  Circuits, Design, and  Verification (ICDV 2025)

9.   Tran, TK., Huynh, MT., Pham, DH., Pham, CK., Huynh, HT. “Edge-Optimized CNN Accelerator: A Flexible and Lightweight Architecture. Intelligent Systems and Data Science”, Intelligent Systems and Data Science (ISDS 2025)

10. Nhu-Hoang Nguyen; Phat Dang; Thanh Dat Bui; Trong-Thuc Hoang; Cong-Kha Pham; Huu Thuan Huynh. “Designing and Implementing a 2D Integer DCT Hardware Accelerator Fully Compatible with Versatile Video Coding.” In International Conference on Computational Science and Its Applications, Springer Nature Switzerland, 2024

11. Nhu-Hoang Nguyen, Tan-Phat Dang, Tuan-Kiet Tran, Thanh-Dat Bui, Trong-Thuc Hoang, Huu-Thuan Huynh, “A Configurable 2D-Integer DCT Hardware Accelerator Compatible with H. 266 Standard based on RISC-V Architecture”, 2024 7th International Seminar on Research of Information Technology and Intelligent Systems (ISRITI) (pp. 894-899). IEEE.

12. Huu-Thuan Huynh, Tan-Phat Dang, Tuan-Kiet Tran, Trong-Thuc Hoang, Cong-Kha Pham, “A multimode SHA-3 accelerator based on RISC-V system”  IEICE Electronics Express, Vol. 21 (2024), pp.20240156

13. Dang, Tan-Phat, Tuan-Kiet Tran, Trong-Thuc Hoang, Cong-Kha Pham, and Huu-Thuan Huynh. "A High-Performance Pipelined FPGA-SoC Implementation of SHA3-512 for Single and Multiple Message Blocks." In International Conference on Intelligence of Things, pp. 288-298. Cham: Springer Nature Switzerland, 2023.

14. Dang, Tan-Phat, Tuan-Kiet Tran, Trong-Thuc Hoang, Cong-Kha Pham, and Huu-Thuan Huynh. "The Efficiency of High-performance SHA-3 Accelerator on the System Level." In 2023 International Symposium on Electrical and Electronics Engineering, pp. 7-12. IEEE, 2023.

15. Tran, Tuan-Kiet, Tan-Phat Dang, Trong-Thuc Hoang, Cong-Kha Pham, and Huu-Thuan Huynh. "Optimizing ECC Implementations Based on SoC-FPGA with Hardware Scheduling and Full Pipeline Multiplier for IoT Platforms." In International Conference on Intelligence of Things, pp. 299-309. Cham: Springer Nature Switzerland, 2023.

16. Huynh, Huu-Thuan, Tan-Phat Dang, Trong-Thuc Hoang, Cong-Kha Pham, and Tuan-Kiet Tran. "An Efficient Cryptographic Accelerators for IoT System Based on Elliptic Curve Digital Signature." In International Conference on Intelligent Systems and Data Science, pp. 106-118. Singapore: Springer Nature Singapore, 2023.

17. Tuan-Kiet Tran, Tan-Phat Dang, Trong-Tu Bui, and Huu-Thuan Huynh, "A Reliable Approach to Secure IoT Systems Using Cryptosystems Based on SoC FPGA Platforms," 2021 International Symposium on Electrical and Electronics Engineering (ISEE), 2021, pp. 53-58

18. Tan-Phat Dang, Tuan-Kiet Tran, Trong-Tu Bui, and Huu-Thuan Huynh, “LoRa Gateway Based on SoC FPGA Platforms,” 2021 International Symposium on Electrical and Electronics Engineering (ISEE), 2021, pp. 48-52