Biography: Nhu-Hoang Nguyen received a Bachelor of Science (B.Sc.) degree and a Master of Science (M.S.) degree in Electronics Telecommunications Engineering and Electronics Engineering, awarded by the University of Science, Ho Chi Minh City (HCMUS) in 2022 and 2025, respectively. Presently, he is an active member of the Faculty of Electronics and Telecommunications (FETEL) at HCMUS, Vietnam. His primary focus lies in FPGA-based hardware accelerators.

Research Interests: Hardware accelerator, Cryptography, Video Compression

Teaching: C programming Lab, Computer Structure Lab, Microcontroller Lab.

Project:

• Research on parallel processing techniques in new video compression standards, (HCMUS project, code ĐT-VT 2023-06), 2023.

Publication: 

[1]   Nguyen, N. H., Dang, T. P., Bui, T. D., Hoang, T. T., Pham, C. K., & Huynh, H. T., “Designing and Implementing a 2D Integer DCT Hardware Accelerator Fully Compatible with Versatile Video Coding”, in Computational Science and Its Applications - ICCSA 2024 Workshops. Cham: Springer Nature Switzerland, 2024, pp. 110-121.

[2]   Nguyen, N. H., Dang, T. P., Tran, T. K., Bui, T. D., Hoang, T. T., & Huynh, H. T., “A configurable 2D integer DCT Hardware Accelerator compatible with H.266 standard based on RISC-V Architecture'”, in 2024 7th International Seminar on Research of Information Technology and Intelligent Systems (ISRITI).