Biography: Tuan-Kiet Tran earned a Bachelor’s degree from the University of Science in 2017, majoring in Telecommunications and Electronics. Pursuing further academic excellence, he completed a Master of Science in 2019 at the same university, specializing in Electronics Engineering.

Research Interests: FPGA-based hardware accelerator for AIoT and Cryptography, Embedded system 

Teaching subject: C Programming; Data Structure and Algorithms.

Research project:  

+ Research and Development of a Security System Utilizing Hardware Accelerators on SoC FPGA Platforms, which is funded by the University of Science, VNU-HCM under grant number DTVT 2022-04.

+ Research on Hardware Accelerators for CNN is funded by the University of Science, VNU-HCM under grant number T2024-55. 

+ Research and Implementation of an Edge Processing System for Artificial Intelligence Using RISC-V Core, which is funded by the University of Science, VNU-HCM under grant number DTVT 2024-08. 

+  IC Design for a Hardware Accelerator in ECG Classification Based on Deep Learning Algorithms and RISC-V CPU, which is funded by the VNU-HCM under grant number DS.C2025 -18-16. 

Publications:

1. Tuan-Kiet, T. R. A. N., HUYNH, H. T., NGUYEN, D. P., Dinh-Dung, L. E., Thi-Hong, T. R. A. N., & NAKASHIMA, Y. (2018, October). Demonstration of a visible light receiver using rolling-shutter smartphone camera. In 2018 International Conference on Advanced Technologies for Communications (ATC) (pp. 214-219). IEEE. 

2. Nguyen, D. P., Le, D. D., Tran, T. K., & Bao, V. N. Q. (2019, December). A Prototype of FPGA-based Centralized Multiple Transmitters for Visible Light Communications. In 2019 6th NAFOSTED Conference on Information and Computer Science (NICS) (pp. 142-147). IEEE. 

3. Huynh, H. T., Tran, T. K., Dang, T. P., & Bui, T. T. (2020, August). Security enhancement for IoT systems based on SoC FPGA platforms. In 2020 4th International Conference on Recent Advances in Signal Processing, Telecommunications & Computing (SigTelCom) (pp. 35-39). IEEE. 

4. Dang, T. P., Tran, T. K., Bui, T. T., & Huynh, H. T. (2021, April). Lora gateway based on soc fpga platforms. In 2021 International Symposium on Electrical and Electronics Engineering (ISEE) (pp. 48-52). IEEE. 

5. Tran, T. K., Dang, T. P., Bui, T. T., & Huynh, H. T. (2021, April). A reliable approach to secure iot systems using cryptosystems based on soc fpga platforms. In 2021 International Symposium on Electrical and Electronics Engineering (ISEE) (pp. 53-58). IEEE. 

6. Dang, T. P., Tran, T. K., Hoang, T. T., Pham, C. K., & Huynh, H. T. (2023, October). A High-Performance Pipelined FPGA-SoC Implementation of SHA3-512 for Single and Multiple Message Blocks. In International Conference on Intelligence of Things (pp. 288-298). Cham: Springer Nature Switzerland. 

7. Tran, T. K., Dang, T. P., Hoang, T. T., Pham, C. K., & Huynh, H. T. (2023, October). Optimizing ECC Implementations Based on SoC-FPGA with Hardware Scheduling and Full Pipeline Multiplier for IoT Platforms. In International Conference on Intelligence of Things (pp. 299-309). Cham: Springer Nature Switzerland. 

8. Huynh, H. T., Dang, T. P., Hoang, T. T., Pham, C. K., & Tran, T. K. (2023, October). An efficient cryptographic accelerators for IoT system based on elliptic curve digital signature. In International Conference on Intelligent Systems and Data Science (pp. 106-118). Singapore: Springer Nature Singapore. 

9. Huynh, H. T., Dang, T. P., Tran, T. K., Hoang, T. T., & Pham, C. K. (2024). A multimode SHA-3 accelerator based on RISC-V system. IEICE Electronics Express, 21(11), 20240156-20240156.